Thu 11 Jan 2018 11:45 - 12:10 at Watercourt - Program Analysis I Chair(s): Tachio Terauchi

Modern optimizing compiler design integrates program transformation strategies aimed at reducing data movement to/from main memory, exploiting the data cache hierarchy. But in reality, the effect of these transformations on the actual cache miss count is ignored in compilers, due to the lack of precise compile-time models of misses for hierarchical caches. Going a step further, when considering real-life systems, the data is vulnerable to hardware faults (e.g., bit flip) when it is stored in a cache without automatic error detection/correction. Determining the cache vulnerability of a program requires the computation of the lifetime of each data element in the cache, and the current state of practice for both cache miss analysis as well as vulnerability analysis is based on accurate simulation.

This paper takes a fundamentally different approach, made possible by focusing on polyhedral programs with static control flow: instead of relying on costly simulation, this paper develops the first closed-form solution for exact modeling of misses in a set-associative cache hierarchy. It then develops the first closed-form solution to cache vulnerability analysis for general polyhedral programs, enabling simulation-less selection of program transformations at compile-time to optimize cache misses, vulnerability, or a mix of both. A push-button tool implementing the approach is developed and used for extensive validation of the complete framework.

Thu 11 Jan

Displayed time zone: Tijuana, Baja California change

10:30 - 12:10
Program Analysis IResearch Papers at Watercourt
Chair(s): Tachio Terauchi Waseda University
10:30
25m
Talk
Inference of Static Semantics for Incomplete C Programs
Research Papers
Pre-print
10:55
25m
Talk
Optimal Dyck Reachability for Data-dependence and Alias Analysis
Research Papers
Krishnendu Chatterjee IST Austria, Andreas Pavlogiannis IST Austria, Bhavya Choudhary IIT Bombay
11:20
25m
Talk
Data-centric Dynamic Partial Order Reduction
Research Papers
Marek Chalupa Masaryk University, Krishnendu Chatterjee IST Austria, Andreas Pavlogiannis IST Austria, Kapil Vaidya IIT Bombay, Nishant Sinha IBM Research
11:45
25m
Talk
Analytical Modeling of Cache Behavior for Affine Programs
Research Papers
Wenlei Bao Ohio State University, Sriram Krishnamoorthy Pacific Northwest National Laboratories, Louis-Noël Pouchet Colorado State University, P. Sadayappan Ohio State University